Digital Design Engineering Manager jobs in California

Job Description

We are looking for a hands-on Senior Digital Design Engineering Manager to drive high-speed connectivity solutions. You will build and lead a team that will deliver micro-architecture and implementation of the front-end digital design, including RTL, synthesis, IP integration, and block-level verification for high performance ASICs. The candidate must have good knowledge of communication/interface protocols such as CXL/PCIE (Gen-3 and above) or Ethernet. 

Basic qualifications:

• Strong academic and technical background in electrical engineering. A Bachelor’s degree in EE is required, and a Master’s degree is preferred.
• 15 years’ experience supporting or developing complex SoC/silicon products for Server, Storage, and/or Networking applications.
• 10 years’ experience managing a team of RTL design engineers.
• Professional attitude with the ability to prioritize a dynamic list of multiple tasks, plan and prepare for customer meetings in advance, and work with minimal guidance and supervision.
• Entrepreneurial, open-mind behavior and can-do attitude. Think and act fast with the customer in mind!
• Authorized to work in US and start immediately.

Required experience:

• Hands-on, thorough knowledge of high-speed protocols like CXL/PCIe or Ethernet.
• Proven front end design expertise – architecture, RTL, simulations, synthesis, timing closure, GLS, DFT etc.
• Experience with Cadence and/or Synopsys digital design tools/flows
• Experience with scripting and automation, with a strong methodology background.
• Good knowledge of design for test (DFT), stuck-at and transition scan test insertion
• Familiarity with UVM based design verification
• Silicon bring-up and debug expertise
• Small-geometry CMOS (≤28nm) design

Preferred experience:

• Scripting with Python or other equivalent programming languages.
• Development/support for PCIe or Ethernet Switch products.